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| author | Philip Yang <[email protected]> | 2022-04-01 19:30:12 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2022-04-05 14:29:47 +0000 |
| commit | 0f12a22f375400a3fc42b86a0f8c23da530fb0fc (patch) | |
| tree | 0877788955c2d8801fa3bcf6fdf1157793785a5a /drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h | |
| parent | drm/amdgpu: don't use BACO for reset in S3 (diff) | |
| download | kernel-0f12a22f375400a3fc42b86a0f8c23da530fb0fc.tar.gz kernel-0f12a22f375400a3fc42b86a0f8c23da530fb0fc.zip | |
drm/amdgpu: Flush TLB after mapping for VG20+XGMI
For VG20 + XGMI bridge, all mappings PTEs cache in TC, this may have
stall invalid PTEs in TC because one cache line has 8 pages. Need always
flush_tlb after updating mapping.
Signed-off-by: Philip Yang <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h')
0 files changed, 0 insertions, 0 deletions