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| author | Zhongwei <[email protected]> | 2024-09-18 06:43:49 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2024-10-07 18:11:42 +0000 |
| commit | ffa1e31f70d2e97c121709b44a8960f5d7becb10 (patch) | |
| tree | 191fcf10de339f6f365de33881008bcf5b7afa73 /drivers/gpu/drm/amd/display/modules/freesync/freesync.c | |
| parent | drm/amd/display: Assign socclk in dml (diff) | |
| download | kernel-ffa1e31f70d2e97c121709b44a8960f5d7becb10.tar.gz kernel-ffa1e31f70d2e97c121709b44a8960f5d7becb10.zip | |
drm/amd/display: Fix garbage or black screen when resetting otg
[Why]
For some EDP to MIPI panel, disabling OTG when link is alive like boot
case, the converter might output garbage or show no display because our
GPU is not sending required pixel data.
Alos Dig fifo underflow was found which might cause garbage, when
resetting otg for other types of EDP panels.
[How]
Skipping resetting OTG if the dig fifo is on. Make sure that the otg for
the pipe is the one that the dig fifo is selecting via the FE mask.
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Signed-off-by: Zhongwei <[email protected]>
Signed-off-by: Rodrigo Siqueira <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/display/modules/freesync/freesync.c')
0 files changed, 0 insertions, 0 deletions