diff options
| author | Wyatt Wood <[email protected]> | 2021-05-06 20:11:16 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2021-05-20 02:39:36 +0000 |
| commit | 3ca402375a2197579d1029e7fa9d856847fe0e7b (patch) | |
| tree | 0123f32e6a364d35e44f8410628ebf8426ea2263 /drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h | |
| parent | drm/amd/display: Use the correct max downscaling value for DCN3.x family (diff) | |
| download | kernel-3ca402375a2197579d1029e7fa9d856847fe0e7b.tar.gz kernel-3ca402375a2197579d1029e7fa9d856847fe0e7b.zip | |
drm/amd/display: Refactor and add visual confirm for HW Flip Queue
[Why]
Visual confirm will indicate if driver is programming
the surface address.
Refactor is required because much of the visual confirm
logic is buried deep in the mpcc files.
In addition, visual confirm is not updated during fast updates.
[How]
In order to have visual confirm for driver flips, visual confirm
needs to be updated on every frame, including fast updates.
Add a new hw sequencer interface update_visual_confirm_color,
and a new mpc function pointer set_bg_color.
v2: drop unused variable (Alex)
Signed-off-by: Wyatt Wood <[email protected]>
Reviewed-by: Aric Cyr <[email protected]>
Acked-by: Stylon Wang <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h index 1d5853c95448..43284d410687 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h @@ -235,6 +235,10 @@ struct hw_sequencer_funcs { enum dc_color_depth color_depth, const struct tg_color *solid_color, int width, int height, int offset); + void (*update_visual_confirm_color)(struct dc *dc, + struct pipe_ctx *pipe_ctx, + struct tg_color *color, + int mpcc_id); }; void color_space_to_black_color( |