aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/display/dc/inc/hw
diff options
context:
space:
mode:
authorIlya Bakoulin <[email protected]>2025-06-05 15:48:23 +0000
committerAlex Deucher <[email protected]>2025-06-24 13:58:17 +0000
commitc233ec1902430f7791d1e0deff6b480b084b2f0e (patch)
treeed1cb6d11774ca9c27e58dbf699c1e4fddebcc0d /drivers/gpu/drm/amd/display/dc/inc/hw
parentdrm/amd/display: DML21 Reintegration (diff)
downloadkernel-c233ec1902430f7791d1e0deff6b480b084b2f0e.tar.gz
kernel-c233ec1902430f7791d1e0deff6b480b084b2f0e.zip
drm/amd/display: Add num_slices_h to set_dto_dscclk signature
Add the number of horizontal slices argument to allow configuring clock based on slice number. Reviewed-by: Nevenko Stupar <[email protected]> Signed-off-by: Ilya Bakoulin <[email protected]> Signed-off-by: Fangzhi Zuo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw')
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h
index e94e9ba60f55..61c4d2a7db1c 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h
@@ -211,7 +211,7 @@ struct dccg_funcs {
struct dccg *dccg,
enum streamclk_source src,
uint32_t otg_inst);
- void (*set_dto_dscclk)(struct dccg *dccg, uint32_t dsc_inst);
+ void (*set_dto_dscclk)(struct dccg *dccg, uint32_t dsc_inst, uint32_t num_slices_h);
void (*set_ref_dscclk)(struct dccg *dccg, uint32_t dsc_inst);
void (*dccg_root_gate_disable_control)(struct dccg *dccg, uint32_t pipe_idx, uint32_t disable_clock_gating);
};