diff options
| author | Ausef Yousof <[email protected]> | 2025-03-28 15:06:27 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2025-04-07 22:01:08 +0000 |
| commit | 556db637c27a463cd6bafa40714ea1245414456a (patch) | |
| tree | 737db0dc86db8b534432f63fb75b8f827b75a9ea /drivers/gpu/drm/amd/display/dc/inc/hw/optc.h | |
| parent | drm/amd/display: Remove double checks for `debug.enable_mem_low_power.bits.cm` (diff) | |
| download | kernel-556db637c27a463cd6bafa40714ea1245414456a.tar.gz kernel-556db637c27a463cd6bafa40714ea1245414456a.zip | |
drm/amd/display: wait for updates to latch before locking
[why&how]
It is possible for an update to acquire otg lock and begin programming
while the previous update has not completed and its values have not
latched. The correct way to go about this is to wait until the vupdate
pulses so we can be sure that previous updates have latched and we can
continue with the current update pipe programming, otherwise during
consecutive full updates we will have corruption flash on the screen.
The corruption flash occurs specifically on configs that require odm
combine, and its local to a specific pipe (will not flash across whole
screen). This ticket is across the otg slave, but it may also appear
across master.
Reviewed-by: Leo Chen <[email protected]>
Signed-off-by: Ausef Yousof <[email protected]>
Signed-off-by: Roman Li <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/optc.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/hw/optc.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/optc.h b/drivers/gpu/drm/amd/display/dc/inc/hw/optc.h index 7f371cbb35cd..0d5a8358a778 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/optc.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/optc.h @@ -68,6 +68,7 @@ struct optc { int pstate_keepout; struct dc_crtc_timing orginal_patched_timing; enum signal_type signal; + uint32_t max_frame_count; }; void optc1_read_otg_state(struct timing_generator *optc, struct dcn_otg_state *s); |
