diff options
| author | Adam Nelson <[email protected]> | 2024-04-09 21:38:44 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2024-05-13 19:46:27 +0000 |
| commit | 9de99fa8c1eab5d7d1f363dcba0786a9b9cc51f4 (patch) | |
| tree | 4ad2c7714c2140cae285f4fb72bac87c35973e80 /drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h | |
| parent | drm/amd/display: Fix write to non-existent reg on DCN401 (diff) | |
| download | kernel-9de99fa8c1eab5d7d1f363dcba0786a9b9cc51f4.tar.gz kernel-9de99fa8c1eab5d7d1f363dcba0786a9b9cc51f4.zip | |
drm/amd/display: Fix 3dlut size for Fastloading on DCN401
[WHY]
After a non-3dlut test the MPCC_MCM_3DLUT_MODE::MPCC_MCM_3DLUT_SIZE is
incorrect.
[HOW]
Add register write to make valid.
Acked-by: Alex Hung <[email protected]>
Reviewed-by: Rodrigo Siqueira <[email protected]>
Signed-off-by: Adam Nelson <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h b/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h index dd786600668f..34cf8efc5cb9 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h @@ -576,6 +576,7 @@ struct mpc_funcs { void (*program_lut_read_write_control)(struct mpc *mpc, const enum MCM_LUT_ID id, bool lut_bank_a, int mpcc_id); void (*program_lut_mode)(struct mpc *mpc, const enum MCM_LUT_ID id, const enum MCM_LUT_XABLE xable, bool lut_bank_a, int mpcc_id); + void (*program_3dlut_size)(struct mpc *mpc, bool is_17x17x17, int mpcc_id); }; #endif |