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authorBhawanpreet Lakha <[email protected]>2020-05-21 16:35:22 +0000
committerAlex Deucher <[email protected]>2020-07-01 05:59:14 +0000
commit03f54d7d3448dc1668568d1adb69b43c1d1dc79f (patch)
treed6a30bd7e9ee594d22413a29f16185e489db6e4a /drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
parentdrm/amd/display: Add DCN3 MPC (diff)
downloadkernel-03f54d7d3448dc1668568d1adb69b43c1d1dc79f.tar.gz
kernel-03f54d7d3448dc1668568d1adb69b43c1d1dc79f.zip
drm/amd/display: Add DCN3 DPP
Add support to program the DCN3 DPP (Multiple pipe and plane combine) HW Blocks: +--------+ | DPP | +--------+ | v +--------+ | MPC | +--------+ | v +-------+ | OPP | +-------+ | v +--------+ | OPTC | +--------+ | v +--------+ +--------+ | DIO | | DCCG | +--------+ +--------+ Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
index 45ef390ae052..0491720c5fe9 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
@@ -121,6 +121,13 @@ struct CM_bias_params {
};
struct dpp_funcs {
+#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
+ bool (*dpp_program_gamcor_lut)(
+ struct dpp *dpp_base, const struct pwl_params *params);
+
+ void (*dpp_set_pre_degam)(struct dpp *dpp_base,
+ enum dc_transfer_func_predefined tr);
+#endif
void (*dpp_program_cm_dealpha)(struct dpp *dpp_base,
uint32_t enable, uint32_t additive_blending);