diff options
| author | Anthony Koo <[email protected]> | 2019-02-09 01:50:51 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2019-03-19 20:04:03 +0000 |
| commit | 46570f090469c8c453622523ae5ccede256148f5 (patch) | |
| tree | 33c35caefc477e64a00e03fb8efd287b6473bbdd /drivers/gpu/drm/amd/display/dc/inc/clock_source.h | |
| parent | drm/amd/display: Refactor pageflips plane commit (diff) | |
| download | kernel-46570f090469c8c453622523ae5ccede256148f5.tar.gz kernel-46570f090469c8c453622523ae5ccede256148f5.zip | |
drm/amd/display: Keep clocks high before seamless boot done
[Why]
UEFI boot usually uses a boot profile that uses higher clocks
and watermark settings.
UEFI boot surface is less optimal, for example it uses linear surface
[How]
Before we finish our seamless boot sequence, keep the clock and
watermark settings from boot.
Update to optimal settings only after first flip away from UEFI
frame buffer.
Signed-off-by: Anthony Koo <[email protected]>
Reviewed-by: Aric Cyr <[email protected]>
Acked-by: Bhawanpreet Lakha <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/clock_source.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/clock_source.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/clock_source.h b/drivers/gpu/drm/amd/display/dc/inc/clock_source.h index fe6301cb8681..1b01a9a58d14 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/clock_source.h +++ b/drivers/gpu/drm/amd/display/dc/inc/clock_source.h @@ -167,7 +167,7 @@ struct clock_source_funcs { struct pixel_clk_params *, struct pll_settings *); bool (*get_pixel_clk_frequency_100hz)( - struct clock_source *clock_source, + const struct clock_source *clock_source, unsigned int inst, unsigned int *pixel_clk_khz); }; |