diff options
| author | Michael Strauss <[email protected]> | 2022-06-09 14:45:34 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2022-07-25 21:16:45 +0000 |
| commit | 1c5a2fa97b91d37375f4fc8aeb37c9456c93c828 (patch) | |
| tree | 61fd64e7e004bb9ba3467e79bbb7a3261d5d9431 /drivers/gpu/drm/amd/display/dc/inc/clock_source.h | |
| parent | drm/amd/display: Add pixel rate div calcs and programming (diff) | |
| download | kernel-1c5a2fa97b91d37375f4fc8aeb37c9456c93c828.tar.gz kernel-1c5a2fa97b91d37375f4fc8aeb37c9456c93c828.zip | |
drm/amd/display: Use correct DTO_SRC_SEL for 128b/132b encoding
[WHY]
DP DTO isn't used for 128b/132b encoding
[HOW]
Check current link rate to determine whether using 8b/10b or 128/132b encoding
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Acked-by: Alex Hung <[email protected]>
Signed-off-by: Michael Strauss <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/clock_source.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/clock_source.h | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/clock_source.h b/drivers/gpu/drm/amd/display/dc/inc/clock_source.h index e2b3a2c7a927..8f8ac8e29ed0 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/clock_source.h +++ b/drivers/gpu/drm/amd/display/dc/inc/clock_source.h @@ -160,8 +160,11 @@ struct calc_pll_clock_source { struct clock_source_funcs { bool (*cs_power_down)( struct clock_source *); - bool (*program_pix_clk)(struct clock_source *, - struct pixel_clk_params *, struct pll_settings *); + bool (*program_pix_clk)( + struct clock_source *, + struct pixel_clk_params *, + enum dp_link_encoding encoding, + struct pll_settings *); uint32_t (*get_pix_clk_dividers)( struct clock_source *, struct pixel_clk_params *, |