diff options
| author | Dillon Varone <[email protected]> | 2024-04-15 17:13:56 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2024-05-08 18:57:04 +0000 |
| commit | 0127f0445f7c1f3338186d8c59ddcadf46a7036f (patch) | |
| tree | 32f5e1bd82d063d8eab896a3c6bc476d7ebdf69d /drivers/gpu/drm/amd/display/dc/inc/clock_source.h | |
| parent | drm/amd/display: Providing a mechanism to have a custom pwm frequency (diff) | |
| download | kernel-0127f0445f7c1f3338186d8c59ddcadf46a7036f.tar.gz kernel-0127f0445f7c1f3338186d8c59ddcadf46a7036f.zip | |
drm/amd/display: Refactor input mode programming for DIG FIFO
[WHY]
Input mode for the DIG FIFO should be programmed as part of stream
encoder setup.
[HOW]
Pre-calculate the pixels per cycle as part of the pixel clock params,
and program as part of stream encoder setup.
Reviewed-by: Wenjing Liu <[email protected]>
Acked-by: Tom Chung <[email protected]>
Signed-off-by: Dillon Varone <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/clock_source.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/clock_source.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/clock_source.h b/drivers/gpu/drm/amd/display/dc/inc/clock_source.h index 8f8ac8e29ed0..ed2f8005d85e 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/clock_source.h +++ b/drivers/gpu/drm/amd/display/dc/inc/clock_source.h @@ -96,6 +96,7 @@ struct pixel_clk_params { /*> de-spread info, relevant only for on-the-fly tune-up pixel rate*/ enum dc_pixel_encoding pixel_encoding; struct pixel_clk_flags flags; + uint32_t dio_se_pix_per_cycle; }; /** |