aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
diff options
context:
space:
mode:
authorNicholas Kazlauskas <[email protected]>2024-03-07 19:50:00 +0000
committerAlex Deucher <[email protected]>2024-03-22 19:49:38 +0000
commit8803bfffb7f81a6e62950ce772bd4d02b02b1adf (patch)
tree0ded8aafcf68c36fa3a806524d5551e23a58d09d /drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
parentdrm/amd/display: Detect and disallow idle reallow during reentrancy (diff)
downloadkernel-8803bfffb7f81a6e62950ce772bd4d02b02b1adf.tar.gz
kernel-8803bfffb7f81a6e62950ce772bd4d02b02b1adf.zip
drm/amd/display: Add optional optimization for IPS handshake
[Why] It's possible to skip parts of the eval and exit sequencing if we know whether DCN is in IPS2 already or if it's committed to going to idle and not in IPS2. [How] Skip IPS2 entry/exit if DMCUB is idle but the IPS2 commit is not set. Skip the eval delay if DMCUB is already in IPS2 since we know we need to exit. These are turned off by default. Reviewed-by: Duncan Ma <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
index 4878e9e50440..12c142cae78b 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
+++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
@@ -1318,13 +1318,16 @@ static void dc_dmub_srv_exit_low_power_state(const struct dc *dc)
*/
dc_dmub_srv->needs_idle_wake = false;
- if (prev_driver_signals.bits.allow_ips2) {
+ if (prev_driver_signals.bits.allow_ips2 &&
+ (!dc->debug.optimize_ips_handshake ||
+ ips_fw->signals.bits.ips2_commit || !ips_fw->signals.bits.in_idle)) {
DC_LOG_IPS(
"wait IPS2 eval (ips1_commit=%d ips2_commit=%d)",
ips_fw->signals.bits.ips1_commit,
ips_fw->signals.bits.ips2_commit);
- udelay(dc->debug.ips2_eval_delay_us);
+ if (!dc->debug.optimize_ips_handshake || !ips_fw->signals.bits.ips2_commit)
+ udelay(dc->debug.ips2_eval_delay_us);
if (ips_fw->signals.bits.ips2_commit) {
DC_LOG_IPS(