diff options
| author | Alex Deucher <[email protected]> | 2021-03-03 15:18:53 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2021-03-05 20:13:37 +0000 |
| commit | 1b1cbf92292095662d156ad7455e16ed6d6cb1d9 (patch) | |
| tree | 1537e97350b08cabc438b31e3d9af52265d9e5f7 /drivers/gpu/drm/amd/display/dc/bios/command_table.c | |
| parent | drm/amdgpu: enable TMZ by default on Raven asics (diff) | |
| download | kernel-1b1cbf92292095662d156ad7455e16ed6d6cb1d9.tar.gz kernel-1b1cbf92292095662d156ad7455e16ed6d6cb1d9.zip | |
drm/amdgpu/dc: fill in missing call to atom cmd table for pll adjust v2
We set up the parameters, but never called the atom table.
Reviewed-by: Harry Wentland <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/bios/command_table.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/bios/command_table.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table.c b/drivers/gpu/drm/amd/display/dc/bios/command_table.c index afc10b954ffa..ad13e4e36d77 100644 --- a/drivers/gpu/drm/amd/display/dc/bios/command_table.c +++ b/drivers/gpu/drm/amd/display/dc/bios/command_table.c @@ -1531,6 +1531,27 @@ static enum bp_result adjust_display_pll_v2( params.ucEncodeMode = (uint8_t)bp->cmd_helper->encoder_mode_bp_to_atom( bp_params->signal_type, false); + + if (EXEC_BIOS_CMD_TABLE(AdjustDisplayPll, params)) { + /* Convert output pixel clock back 10KHz-->KHz: multiply + * original pixel clock in KHz by ratio + * [output pxlClk/input pxlClk] */ + uint64_t pixel_clk_10_khz_out = + (uint64_t)le16_to_cpu(params.usPixelClock); + uint64_t pixel_clk = (uint64_t)bp_params->pixel_clock; + + if (pixel_clock_10KHz_in != 0) { + bp_params->adjusted_pixel_clock = + div_u64(pixel_clk * pixel_clk_10_khz_out, + pixel_clock_10KHz_in); + } else { + bp_params->adjusted_pixel_clock = 0; + BREAK_TO_DEBUGGER(); + } + + result = BP_RESULT_OK; + } + return result; } |
