aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
diff options
context:
space:
mode:
authorAustin Zheng <[email protected]>2025-05-06 14:35:49 +0000
committerAlex Deucher <[email protected]>2025-06-18 16:19:16 +0000
commitf94877038770073b465eece8636e221653d2beae (patch)
tree83b85376d20bd13cf8e0f43d5d7fa3f7d1ba6b1b /drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
parentdrm/amd/display: Update tmz_surface type to match register (diff)
downloadkernel-f94877038770073b465eece8636e221653d2beae.tar.gz
kernel-f94877038770073b465eece8636e221653d2beae.zip
drm/amd/display: Deprecate Loading Bounding Box From DMUB On DCN4
[WHY] dml2_soc_bb struct can continuously receive updates for future ASICs. Alignment issues may arise since VBIOS DMCUB contains an older version of the SOC BB. Populating the bounding box with values from DMCUB is no longer necessary since values such as UCLK will be overridden by values acquired by PMFW anyways. [HOW] Use bb_from_dmub to store DCN specific bounding box parameters in DMCUB. Add helpers to translate DCN specific struct to the corresponding dml2_soc_bb field. To avoid alignment issues: Deprecate applying DMCUB SoC BB for DCN4 For future projects: Create a flattened struct containing all sensitive parameters in the bounding box. New parameters can be added to the bottom of the new struct as needed. Reviewed-by: Dillon Varone <[email protected]> Signed-off-by: Austin Zheng <[email protected]> Signed-off-by: Alex Hung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c')
-rw-r--r--drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 78816712afbb..6c23aec44295 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1758,10 +1758,11 @@ dm_dmub_send_vbios_gpint_command(struct amdgpu_device *adev,
return DMUB_STATUS_TIMEOUT;
}
-static struct dml2_soc_bb *dm_dmub_get_vbios_bounding_box(struct amdgpu_device *adev)
+static void *dm_dmub_get_vbios_bounding_box(struct amdgpu_device *adev)
{
- struct dml2_soc_bb *bb;
+ void *bb;
long long addr;
+ unsigned int bb_size;
int i = 0;
uint16_t chunk;
enum dmub_gpint_command send_addrs[] = {
@@ -1774,6 +1775,7 @@ static struct dml2_soc_bb *dm_dmub_get_vbios_bounding_box(struct amdgpu_device *
switch (amdgpu_ip_version(adev, DCE_HWIP, 0)) {
case IP_VERSION(4, 0, 1):
+ bb_size = sizeof(struct dml2_soc_bb);
break;
default:
return NULL;
@@ -1781,7 +1783,7 @@ static struct dml2_soc_bb *dm_dmub_get_vbios_bounding_box(struct amdgpu_device *
bb = dm_allocate_gpu_mem(adev,
DC_MEM_ALLOC_TYPE_GART,
- sizeof(struct dml2_soc_bb),
+ bb_size,
&addr);
if (!bb)
return NULL;