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authorAndrey Grodzovsky <[email protected]>2018-09-12 20:38:57 +0000
committerAlex Deucher <[email protected]>2018-09-13 20:14:11 +0000
commitc37e2d29f0fbc933508637d7129a8f079b06ab40 (patch)
treea57dea0f6f39b09d760f8e1d96b565f74eec1b5e /drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
parentdrm/amdgpu: allow fragment processing for invalid PTEs (diff)
downloadkernel-c37e2d29f0fbc933508637d7129a8f079b06ab40.tar.gz
kernel-c37e2d29f0fbc933508637d7129a8f079b06ab40.zip
drm/amd/display: Fix pflip IRQ status after gpu reset.
Problem: After GPU reset pflip completion IRQ is disabled and hence any subsequent mode set or plane update leads to hang. Fix: Unless acrtc->otg_inst is initialized to -1 during display block initializtion then durng resume from GPU reset amdgpu_irq_gpu_reset_resume_helper will override CRTC 0 pflip IRQ value with whatever value was on every other unused CRTC because dm_irq_state will do irq_source = dal_irq_type + acrtc->otg_inst where acrtc->otg_inst will be 0 for every unused CRTC. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c')
-rw-r--r--drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index eccae63d3ef1..23ddf54b7dee 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -3424,6 +3424,7 @@ static int amdgpu_dm_crtc_init(struct amdgpu_display_manager *dm,
acrtc->crtc_id = crtc_index;
acrtc->base.enabled = false;
+ acrtc->otg_inst = -1;
dm->adev->mode_info.crtcs[crtc_index] = acrtc;
drm_crtc_enable_color_mgmt(&acrtc->base, MAX_COLOR_LUT_ENTRIES,