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authorHamza Mahfooz <[email protected]>2024-08-06 13:55:55 +0000
committerAlex Deucher <[email protected]>2024-08-13 13:57:52 +0000
commit237193e21b29d4aa0617ffeea3d6f49e72999708 (patch)
treebcf6c8d1c05d838b29d9ce00419fa8494866dfec /drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
parentdrm/amdgpu/mes: fix mes ring buffer overflow (diff)
downloadkernel-237193e21b29d4aa0617ffeea3d6f49e72999708.tar.gz
kernel-237193e21b29d4aa0617ffeea3d6f49e72999708.zip
drm/amd/display: fix s2idle entry for DCN3.5+
To be able to get to the lowest power state when suspending systems with DCN3.5+, we must be in IPS before the display hardware is put into D3cold. So, to ensure that the system always reaches the lowest power state while suspending, force systems that support IPS to enter idle optimizations before entering D3cold. Reviewed-by: Roman Li <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c')
-rw-r--r--drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index ec6064d40dbf..fe8a88a7fe59 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2904,6 +2904,9 @@ static int dm_suspend(void *handle)
hpd_rx_irq_work_suspend(dm);
+ if (adev->dm.dc->caps.ips_support)
+ dc_allow_idle_optimizations(adev->dm.dc, true);
+
dc_set_power_state(dm->dc, DC_ACPI_CM_POWER_STATE_D3);
dc_dmub_srv_set_power_state(dm->dc->ctx->dmub_srv, DC_ACPI_CM_POWER_STATE_D3);