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authorMonk Liu <[email protected]>2017-03-21 03:50:43 +0000
committerAlex Deucher <[email protected]>2017-03-30 03:55:35 +0000
commit9ccd52eb248b0d8f0450e1201a8064f5ab1ec07e (patch)
tree0c8cfea90d21e04347d7f1b5718168be15e74be4 /drivers/gpu/drm/amd/amdgpu/soc15d.h
parentdrm/amdgpu:implement cond_exec for gfx8 (diff)
downloadkernel-9ccd52eb248b0d8f0450e1201a8064f5ab1ec07e.tar.gz
kernel-9ccd52eb248b0d8f0450e1201a8064f5ab1ec07e.zip
drm/amdgpu:enable mcbp for gfx9(v2)
set bit 21 of IB.control filed to actually enable MCBP for SRIOV v2: add flag for preemption enable bit for soc15 and use this flag instead of hardcode. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/soc15d.h')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/soc15d.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15d.h b/drivers/gpu/drm/amd/amdgpu/soc15d.h
index 7d29329bd642..75403c7c8c9e 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15d.h
+++ b/drivers/gpu/drm/amd/amdgpu/soc15d.h
@@ -137,6 +137,7 @@
* 1 - Stream
* 2 - Bypass
*/
+#define INDIRECT_BUFFER_PRE_ENB(x) ((x) << 21)
#define PACKET3_COPY_DATA 0x40
#define PACKET3_PFP_SYNC_ME 0x42
#define PACKET3_COND_WRITE 0x45