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authorHawking Zhang <[email protected]>2019-05-10 16:05:13 +0000
committerAlex Deucher <[email protected]>2019-06-21 23:59:23 +0000
commit44f1bb1fed2596330ab55192ddb280865ebc79d2 (patch)
treeeab6e483fa60253a22ea43c8650e6364fb23d852 /drivers/gpu/drm/amd/amdgpu/soc15.h
parentdrm/amdgpu: add gfx v10 implementation (v10) (diff)
downloadkernel-44f1bb1fed2596330ab55192ddb280865ebc79d2.tar.gz
kernel-44f1bb1fed2596330ab55192ddb280865ebc79d2.zip
drm/amdgpu: avoid to use SOC15_REG_OFFSET in static array for navi10
Move to the header file. Signed-off-by: Hawking Zhang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/soc15.h')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/soc15.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.h b/drivers/gpu/drm/amd/amdgpu/soc15.h
index 48e824d52ad9..7a6b2cc6d9f5 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.h
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.h
@@ -52,6 +52,14 @@ struct soc15_reg_entry {
uint32_t instance;
};
+struct soc15_allowed_register_entry {
+ uint32_t hwip;
+ uint32_t inst;
+ uint32_t seg;
+ uint32_t reg_offset;
+ bool grbm_indexed;
+};
+
#define SOC15_REG_ENTRY(ip, inst, reg) ip##_HWIP, inst, reg##_BASE_IDX, reg
#define SOC15_REG_ENTRY_OFFSET(entry) (adev->reg_offset[entry.hwip][entry.inst][entry.seg] + entry.reg_offset)