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authorWenhui Sheng <[email protected]>2020-07-13 07:15:11 +0000
committerAlex Deucher <[email protected]>2020-07-15 16:41:54 +0000
commit311531f08793931781c74a12082c9a3f8fbfd9ea (patch)
treef9f0251562be8eebe89be6c9f3f9a7c9b4b28061 /drivers/gpu/drm/amd/amdgpu/si.c
parentdrm/amdgpu: RAS emergency restart logic refine (diff)
downloadkernel-311531f08793931781c74a12082c9a3f8fbfd9ea.tar.gz
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drm/amdgpu: enable mode1 reset
For sienna cichlid, add mode1 reset path for sGPU. v2: hiding MP0/MP1 mode1 reset under AMD_RESET_METHOD_MODE1 v3: split emergency restart logic to a new patch Signed-off-by: Likun Gao <[email protected]> Signed-off-by: Wenhui Sheng <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/si.c')
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