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| author | Yang Wang <[email protected]> | 2022-12-05 13:16:26 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2022-12-06 15:18:18 +0000 |
| commit | 347fafe0eb46df941965c355c77ce480e4d49f1f (patch) | |
| tree | 9d768890fa78268808fda5c53a7aa545d75c8001 /drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | |
| parent | drm/amdgpu: add tmz support for GC IP v11.0.4 (diff) | |
| download | kernel-347fafe0eb46df941965c355c77ce480e4d49f1f.tar.gz kernel-347fafe0eb46df941965c355c77ce480e4d49f1f.zip | |
drm/amdgpu: fix mmhub register base coding error
fix MMHUB register base coding error.
Fixes: ec6837591f992 ("drm/amdgpu/gmc10: program the smallK fragment size")
Signed-off-by: Yang Wang <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Cc: [email protected]
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c index 998b5d17b271..0e664d0cc8d5 100644 --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c @@ -319,7 +319,7 @@ static void mmhub_v2_0_init_cache_regs(struct amdgpu_device *adev) tmp = mmMMVM_L2_CNTL5_DEFAULT; tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL5, L2_CACHE_SMALLK_FRAGMENT_SIZE, 0); - WREG32_SOC15(GC, 0, mmMMVM_L2_CNTL5, tmp); + WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL5, tmp); } static void mmhub_v2_0_enable_system_domain(struct amdgpu_device *adev) |