diff options
| author | Alex Deucher <[email protected]> | 2019-04-11 19:54:40 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2019-04-12 16:24:16 +0000 |
| commit | 1925e7d3d4677e681cc2e878c2bdbeaee988c8e2 (patch) | |
| tree | b7c9a2ac4a2f4eacd5e215e2424e82e3c6c5be31 /drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | |
| parent | drm/amdgpu: shadow in shadow_list without tbo.mem.start cause page fault in s... (diff) | |
| download | kernel-1925e7d3d4677e681cc2e878c2bdbeaee988c8e2.tar.gz kernel-1925e7d3d4677e681cc2e878c2bdbeaee988c8e2.zip | |
drm/amdgpu/gmc9: fix VM_L2_CNTL3 programming
Got accidently dropped when 2+1 level support was added.
Fixes: 6a42fd6fbf534096 ("drm/amdgpu: implement 2+1 PD support for Raven v3")
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Cc: [email protected]
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c index d0d966d6080a..1696644ec022 100644 --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c @@ -182,6 +182,7 @@ static void mmhub_v1_0_init_cache_regs(struct amdgpu_device *adev) tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, L2_CACHE_BIGK_FRAGMENT_SIZE, 6); } + WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL3, tmp); tmp = mmVM_L2_CNTL4_DEFAULT; tmp = REG_SET_FIELD(tmp, VM_L2_CNTL4, VMC_TAP_PDE_REQUEST_PHYSICAL, 0); |