diff options
| author | Alex Deucher <[email protected]> | 2025-02-26 17:31:46 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2025-04-08 20:48:21 +0000 |
| commit | 9e2bbba1d516b52c2ebc9875144f544025f9d5ef (patch) | |
| tree | 51e907f8a87ec7c557ace0abdd92a7d3335bc403 /drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | |
| parent | drm/amdgpu: remove is_mes_queue flag (diff) | |
| download | kernel-9e2bbba1d516b52c2ebc9875144f544025f9d5ef.tar.gz kernel-9e2bbba1d516b52c2ebc9875144f544025f9d5ef.zip | |
drm/amdgpu/mes: centralize gfx_hqd mask management
Move it to amdgpu_mes to align with the compute and
sdma hqd masks. No functional change.
v2: rebase on new changes
v3: misc optimizations
Reviewed-by: Prike Liang <[email protected]>
Reviewed-by: Sunil Khatri<[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/mes_v12_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 15 |
1 files changed, 3 insertions, 12 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c index 801928555eff..8892858cfd9a 100644 --- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c +++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c @@ -694,17 +694,6 @@ static int mes_v12_0_set_hw_resources_1(struct amdgpu_mes *mes, int pipe) offsetof(union MESAPI_SET_HW_RESOURCES_1, api_status)); } -static void mes_v12_0_set_gfx_hqd_mask(union MESAPI_SET_HW_RESOURCES *pkt) -{ - /* - * GFX V12 has only one GFX pipe, but 8 queues in it. - * GFX pipe 0 queue 0 is being used by Kernel queue. - * Set GFX pipe 0 queue 1-7 for MES scheduling - * mask = 1111 1110b - */ - pkt->gfx_hqd_mask[0] = 0xFE; -} - static int mes_v12_0_set_hw_resources(struct amdgpu_mes *mes, int pipe) { int i; @@ -727,7 +716,9 @@ static int mes_v12_0_set_hw_resources(struct amdgpu_mes *mes, int pipe) mes_set_hw_res_pkt.compute_hqd_mask[i] = mes->compute_hqd_mask[i]; - mes_v12_0_set_gfx_hqd_mask(&mes_set_hw_res_pkt); + for (i = 0; i < MAX_GFX_PIPES; i++) + mes_set_hw_res_pkt.gfx_hqd_mask[i] = + mes->gfx_hqd_mask[i]; for (i = 0; i < MAX_SDMA_PIPES; i++) mes_set_hw_res_pkt.sdma_hqd_mask[i] = |