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authorAlex Deucher <[email protected]>2025-02-26 17:31:46 +0000
committerAlex Deucher <[email protected]>2025-04-08 20:48:21 +0000
commit9e2bbba1d516b52c2ebc9875144f544025f9d5ef (patch)
tree51e907f8a87ec7c557ace0abdd92a7d3335bc403 /drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
parentdrm/amdgpu: remove is_mes_queue flag (diff)
downloadkernel-9e2bbba1d516b52c2ebc9875144f544025f9d5ef.tar.gz
kernel-9e2bbba1d516b52c2ebc9875144f544025f9d5ef.zip
drm/amdgpu/mes: centralize gfx_hqd mask management
Move it to amdgpu_mes to align with the compute and sdma hqd masks. No functional change. v2: rebase on new changes v3: misc optimizations Reviewed-by: Prike Liang <[email protected]> Reviewed-by: Sunil Khatri<[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/mes_v11_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/mes_v11_0.c16
1 files changed, 3 insertions, 13 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
index ccc19a40f03d..06b51867c9aa 100644
--- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
@@ -669,18 +669,6 @@ static int mes_v11_0_misc_op(struct amdgpu_mes *mes,
offsetof(union MESAPI__MISC, api_status));
}
-static void mes_v11_0_set_gfx_hqd_mask(union MESAPI_SET_HW_RESOURCES *pkt)
-{
- /*
- * GFX pipe 0 queue 0 is being used by Kernel queue.
- * Set GFX pipe 0 queue 1 for MES scheduling
- * mask = 10b
- * GFX pipe 1 can't be used for MES due to HW limitation.
- */
- pkt->gfx_hqd_mask[0] = 0x2;
- pkt->gfx_hqd_mask[1] = 0;
-}
-
static int mes_v11_0_set_hw_resources(struct amdgpu_mes *mes)
{
int i;
@@ -705,7 +693,9 @@ static int mes_v11_0_set_hw_resources(struct amdgpu_mes *mes)
mes_set_hw_res_pkt.compute_hqd_mask[i] =
mes->compute_hqd_mask[i];
- mes_v11_0_set_gfx_hqd_mask(&mes_set_hw_res_pkt);
+ for (i = 0; i < MAX_GFX_PIPES; i++)
+ mes_set_hw_res_pkt.gfx_hqd_mask[i] =
+ mes->gfx_hqd_mask[i];
for (i = 0; i < MAX_SDMA_PIPES; i++)
mes_set_hw_res_pkt.sdma_hqd_mask[i] = mes->sdma_hqd_mask[i];