diff options
| author | Lijo Lazar <[email protected]> | 2023-09-11 08:18:11 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2023-09-20 16:23:28 +0000 |
| commit | 4e8303cf2c4dd27374a16a8881ec1a1cd5baf86f (patch) | |
| tree | 1b95c903467e89eec1b8dacdc9f776a838bb3423 /drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c | |
| parent | drm/amdgpu: add remap_hdp_registers callback for nbio 7.11 (diff) | |
| download | kernel-4e8303cf2c4dd27374a16a8881ec1a1cd5baf86f.tar.gz kernel-4e8303cf2c4dd27374a16a8881ec1a1cd5baf86f.zip | |
drm/amdgpu: Use function for IP version check
Use an inline function for version check. Gives more flexibility to
handle any format changes.
Signed-off-by: Lijo Lazar <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c b/drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c index 6f20f9889a78..ab06c2b4b20b 100644 --- a/drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c +++ b/drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c @@ -51,7 +51,7 @@ static void hdp_v6_0_update_clock_gating(struct amdgpu_device *adev, AMD_CG_SUPPORT_HDP_SD))) return; - if (adev->ip_versions[HDP_HWIP][0] == IP_VERSION(6, 1, 0)) + if (amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(6, 1, 0)) hdp_clk_cntl = RREG32_SOC15(HDP, 0, regHDP_CLK_CNTL_V6_1); else hdp_clk_cntl = RREG32_SOC15(HDP, 0, regHDP_CLK_CNTL); @@ -61,7 +61,7 @@ static void hdp_v6_0_update_clock_gating(struct amdgpu_device *adev, * forced on IPH & RC clock */ hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, RC_MEM_CLK_SOFT_OVERRIDE, 1); - if (adev->ip_versions[HDP_HWIP][0] == IP_VERSION(6, 1, 0)) + if (amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(6, 1, 0)) WREG32_SOC15(HDP, 0, regHDP_CLK_CNTL_V6_1, hdp_clk_cntl); else WREG32_SOC15(HDP, 0, regHDP_CLK_CNTL, hdp_clk_cntl); @@ -126,7 +126,7 @@ static void hdp_v6_0_update_clock_gating(struct amdgpu_device *adev, /* disable IPH & RC clock override after clock/power mode changing */ hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, RC_MEM_CLK_SOFT_OVERRIDE, 0); - if (adev->ip_versions[HDP_HWIP][0] == IP_VERSION(6, 1, 0)) + if (amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(6, 1, 0)) WREG32_SOC15(HDP, 0, regHDP_CLK_CNTL_V6_1, hdp_clk_cntl); else WREG32_SOC15(HDP, 0, regHDP_CLK_CNTL, hdp_clk_cntl); |