diff options
| author | Christian König <[email protected]> | 2015-05-11 12:10:34 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2015-06-04 01:03:32 +0000 |
| commit | d2edb07b10fce5127a60671b55ca53921c212bc3 (patch) | |
| tree | 5c6c7fe319aa67c5ca0a279008381f4a31d3cd22 /drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | |
| parent | drm/amdgpu: always emit GDS switch (diff) | |
| download | kernel-d2edb07b10fce5127a60671b55ca53921c212bc3.tar.gz kernel-d2edb07b10fce5127a60671b55ca53921c212bc3.zip | |
drm/amdgpu: cleanup HDP flush handling
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Jammy Zhou <[email protected]>
Reviewed-by: Monk Liu <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index fc8c46209db4..63ed3b01cea1 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c @@ -3610,7 +3610,7 @@ static void gfx_v8_0_ring_set_wptr_gfx(struct amdgpu_ring *ring) } } -static void gfx_v8_0_hdp_flush_cp_ring_emit(struct amdgpu_ring *ring) +static void gfx_v8_0_ring_emit_hdp_flush(struct amdgpu_ring *ring) { u32 ref_and_mask, reg_mem_engine; @@ -3657,9 +3657,6 @@ static void gfx_v8_0_ring_emit_ib(struct amdgpu_ring *ring, if (ring->type == AMDGPU_RING_TYPE_COMPUTE) control |= INDIRECT_BUFFER_VALID; - if (ib->flush_hdp_writefifo) - next_rptr += 7; - if (ring->need_ctx_switch && ring->type == AMDGPU_RING_TYPE_GFX) next_rptr += 2; @@ -3670,9 +3667,6 @@ static void gfx_v8_0_ring_emit_ib(struct amdgpu_ring *ring, amdgpu_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr) & 0xffffffff); amdgpu_ring_write(ring, next_rptr); - if (ib->flush_hdp_writefifo) - gfx_v8_0_hdp_flush_cp_ring_emit(ring); - /* insert SWITCH_BUFFER packet before first IB in the ring frame */ if (ring->need_ctx_switch && ring->type == AMDGPU_RING_TYPE_GFX) { amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); @@ -4149,6 +4143,7 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_gfx = { .emit_semaphore = gfx_v8_0_ring_emit_semaphore, .emit_vm_flush = gfx_v8_0_ring_emit_vm_flush, .emit_gds_switch = gfx_v8_0_ring_emit_gds_switch, + .emit_hdp_flush = gfx_v8_0_ring_emit_hdp_flush, .test_ring = gfx_v8_0_ring_test_ring, .test_ib = gfx_v8_0_ring_test_ib, .is_lockup = gfx_v8_0_ring_is_lockup, |