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| author | Alex Deucher <[email protected]> | 2023-04-10 16:02:29 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2023-04-24 22:36:47 +0000 |
| commit | b91075866e58e6b073689958f246834ad0b2c79c (patch) | |
| tree | 645a8061675da0f7a0ad6279a25aea9c3a1cbc26 /drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | |
| parent | drm/amdgpu: support psp vbflash sysfs for MP0 13_0_10 (diff) | |
| download | kernel-b91075866e58e6b073689958f246834ad0b2c79c.tar.gz kernel-b91075866e58e6b073689958f246834ad0b2c79c.zip | |
drm/amdgpu/gfx11: update gpu_clock_counter logic
This code was written prior to previous updates to this
logic for other chips. The RSC registers are part of
SMUIO which is an always on block so there is no need
to disable gfxoff. Additionally add the carryover and
preemption checks.
v2: rebase
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c')
0 files changed, 0 insertions, 0 deletions