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authorAlex Deucher <[email protected]>2025-04-14 18:18:03 +0000
committerAlex Deucher <[email protected]>2025-04-21 14:55:47 +0000
commitfb20954c9717d1d07d8b8b8f34ac2a2755aec5ff (patch)
tree058b7f8460e4f74ffbdc7cbfc0991465b6d96ba2 /drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
parentdrm/amd/pm: Enable host limit metrics support (diff)
downloadkernel-fb20954c9717d1d07d8b8b8f34ac2a2755aec5ff.tar.gz
kernel-fb20954c9717d1d07d8b8b8f34ac2a2755aec5ff.zip
drm/amdgpu/userq: rework driver parameter
Replace disable_kq parameter with user_queue parameter. The parameter has the following logic: -1 = auto (ASIC specific default) 0 = user queues disabled 1 = user queues enabled and kernel queues enabled (if supported) 2 = user queues enabled and kernel queues disabled The default behavior (-1) is currently the same as 0 for current ASICs. To enable user queues (in addition to kernel queues) set user_queue=1. To enable user queues and disable kernel queues (to make all resources available to user queues), set user_queue=2. Reviewed-by: Sunil Khatri <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c20
1 files changed, 17 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index a528afe38e0b..70c38e53e691 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -1632,7 +1632,7 @@ static int gfx_v11_0_sw_init(struct amdgpu_ip_block *ip_block)
case IP_VERSION(11, 0, 3):
#ifdef CONFIG_DRM_AMDGPU_NAVI3X_USERQ
/* add firmware version checks here */
- if (0) {
+ if (0 && !adev->gfx.disable_uq) {
adev->userq_funcs[AMDGPU_HW_IP_GFX] = &userq_mes_funcs;
adev->userq_funcs[AMDGPU_HW_IP_COMPUTE] = &userq_mes_funcs;
}
@@ -1646,7 +1646,7 @@ static int gfx_v11_0_sw_init(struct amdgpu_ip_block *ip_block)
case IP_VERSION(11, 5, 3):
#ifdef CONFIG_DRM_AMDGPU_NAVI3X_USERQ
/* add firmware version checks here */
- if (0) {
+ if (0 && !adev->gfx.disable_uq) {
adev->userq_funcs[AMDGPU_HW_IP_GFX] = &userq_mes_funcs;
adev->userq_funcs[AMDGPU_HW_IP_COMPUTE] = &userq_mes_funcs;
}
@@ -5211,8 +5211,22 @@ static int gfx_v11_0_early_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = ip_block->adev;
- if (amdgpu_disable_kq == 1)
+ switch (amdgpu_user_queue) {
+ case -1:
+ case 0:
+ default:
+ adev->gfx.disable_kq = false;
+ adev->gfx.disable_uq = true;
+ break;
+ case 1:
+ adev->gfx.disable_kq = false;
+ adev->gfx.disable_uq = false;
+ break;
+ case 2:
adev->gfx.disable_kq = true;
+ adev->gfx.disable_uq = false;
+ break;
+ }
adev->gfx.funcs = &gfx_v11_0_gfx_funcs;