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authorYiqing Yao <[email protected]>2022-10-28 09:30:17 +0000
committerAlex Deucher <[email protected]>2022-11-04 20:05:53 +0000
commit8a1fbb4a5ec29d9ae5f792a1d3c049c5c709851c (patch)
treeff3915474a7d283901f611766c87c13e39575d38 /drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
parentdrm/amdgpu: Clean up soc21 early init for SRIOV (diff)
downloadkernel-8a1fbb4a5ec29d9ae5f792a1d3c049c5c709851c.tar.gz
kernel-8a1fbb4a5ec29d9ae5f792a1d3c049c5c709851c.zip
drm/amdgpu: Disable MCBP from soc21 for SRIOV
[why] Start from soc21, CP does not support MCBP, so disable it. [how] Used amgpu_mcbp flag alone instead of checking if is in SRIOV to enable/disable MCBP. Only set flag to enable on asic_type prior to soc21 in SRIOV. Signed-off-by: Yiqing Yao <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index f68e13b6282c..84a76c36d9a7 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -5326,7 +5326,7 @@ static void gfx_v11_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
control |= ib->length_dw | (vmid << 24);
- if ((amdgpu_sriov_vf(ring->adev) || amdgpu_mcbp) && (ib->flags & AMDGPU_IB_FLAG_PREEMPT)) {
+ if (amdgpu_mcbp && (ib->flags & AMDGPU_IB_FLAG_PREEMPT)) {
control |= INDIRECT_BUFFER_PRE_ENB(1);
if (flags & AMDGPU_IB_PREEMPTED)