diff options
| author | Maxime Ripard <[email protected]> | 2023-11-15 09:45:19 +0000 |
|---|---|---|
| committer | Maxime Ripard <[email protected]> | 2023-11-15 09:56:44 +0000 |
| commit | 3bf3e21c15d4386a5f15118ec39bbc1b67ea5759 (patch) | |
| tree | a8880bb7b152d913ebd86e7cd858600dbe22ed38 /drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | |
| parent | drm/virtio: Fix return value for VIRTGPU_CONTEXT_PARAM_DEBUG_NAME (diff) | |
| parent | Linux 6.7-rc1 (diff) | |
| download | kernel-3bf3e21c15d4386a5f15118ec39bbc1b67ea5759.tar.gz kernel-3bf3e21c15d4386a5f15118ec39bbc1b67ea5759.zip | |
Merge drm/drm-next into drm-misc-next
Let's kickstart the v6.8 release cycle.
Signed-off-by: Maxime Ripard <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/dce_v10_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c index 584cd5277f92..bb666cb7522e 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c @@ -1036,7 +1036,7 @@ static void dce_v10_0_program_watermarks(struct amdgpu_device *adev, (u32)mode->clock); line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000, (u32)mode->clock); - line_time = min(line_time, (u32)65535); + line_time = min_t(u32, line_time, 65535); /* watermark for high clocks */ if (adev->pm.dpm_enabled) { @@ -1066,7 +1066,7 @@ static void dce_v10_0_program_watermarks(struct amdgpu_device *adev, wm_high.num_heads = num_heads; /* set for high clocks */ - latency_watermark_a = min(dce_v10_0_latency_watermark(&wm_high), (u32)65535); + latency_watermark_a = min_t(u32, dce_v10_0_latency_watermark(&wm_high), 65535); /* possibly force display priority to high */ /* should really do this at mode validation time... */ @@ -1105,7 +1105,7 @@ static void dce_v10_0_program_watermarks(struct amdgpu_device *adev, wm_low.num_heads = num_heads; /* set for low clocks */ - latency_watermark_b = min(dce_v10_0_latency_watermark(&wm_low), (u32)65535); + latency_watermark_b = min_t(u32, dce_v10_0_latency_watermark(&wm_low), 65535); /* possibly force display priority to high */ /* should really do this at mode validation time... */ |