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authorAlexandre Demers <[email protected]>2025-03-06 01:49:56 +0000
committerAlex Deucher <[email protected]>2025-03-07 17:56:08 +0000
commit092da9fb25067a5b61237a7d5badca6e6872a951 (patch)
treed2c0c350074cefd4ff891d41df21c63056495994 /drivers/gpu/drm/amd/amdgpu/cikd.h
parentdrm/amdgpu: Fix annotation for dce_v6_0_line_buffer_adjust function (diff)
downloadkernel-092da9fb25067a5b61237a7d5badca6e6872a951.tar.gz
kernel-092da9fb25067a5b61237a7d5badca6e6872a951.zip
drm/amdgpu: add defines for pin_offsets in DCE8
Define pin_offsets values in the same way it is done in DCE8 Signed-off-by: Alexandre Demers <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/cikd.h')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/cikd.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/cikd.h b/drivers/gpu/drm/amd/amdgpu/cikd.h
index 06088d52d81c..279288365940 100644
--- a/drivers/gpu/drm/amd/amdgpu/cikd.h
+++ b/drivers/gpu/drm/amd/amdgpu/cikd.h
@@ -51,6 +51,15 @@
#define HPD4_REGISTER_OFFSET (0x1813 - 0x1807)
#define HPD5_REGISTER_OFFSET (0x1816 - 0x1807)
+/* audio endpt instance offsets */
+#define AUD0_REGISTER_OFFSET (0x1780 - 0x1780)
+#define AUD1_REGISTER_OFFSET (0x1786 - 0x1780)
+#define AUD2_REGISTER_OFFSET (0x178c - 0x1780)
+#define AUD3_REGISTER_OFFSET (0x1792 - 0x1780)
+#define AUD4_REGISTER_OFFSET (0x1798 - 0x1780)
+#define AUD5_REGISTER_OFFSET (0x179d - 0x1780)
+#define AUD6_REGISTER_OFFSET (0x17a4 - 0x1780)
+
#define BONAIRE_GB_ADDR_CONFIG_GOLDEN 0x12010001
#define HAWAII_GB_ADDR_CONFIG_GOLDEN 0x12011003