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| author | Cyril Bur <[email protected]> | 2025-06-02 12:15:43 +0000 |
|---|---|---|
| committer | Palmer Dabbelt <[email protected]> | 2025-06-05 21:03:17 +0000 |
| commit | 265d6aba165c500389c80d394ac247460c443ef5 (patch) | |
| tree | 4c44f088d103b32e738be63f649b609e6bbdc3c8 /drivers/gpu/drm/amd/amdgpu/atom.c | |
| parent | Merge tag 'riscv-mw2-6.16-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/ker... (diff) | |
| download | kernel-265d6aba165c500389c80d394ac247460c443ef5.tar.gz kernel-265d6aba165c500389c80d394ac247460c443ef5.zip | |
riscv: uaccess: Only restore the CSR_STATUS SUM bit
During switch to csrs will OR the value of the register into the
corresponding csr. In this case we're only interested in restoring the
SUM bit not the entire register.
Signed-off-by: Cyril Bur <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Co-developed-by: Alexandre Ghiti <[email protected]>
Signed-off-by: Alexandre Ghiti <[email protected]>
Fixes: 788aa64c01f1 ("riscv: save the SR_SUM status over switches")
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Palmer Dabbelt <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/atom.c')
0 files changed, 0 insertions, 0 deletions