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| author | Yi-Ling Chen <[email protected]> | 2021-12-13 08:13:26 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2022-01-07 22:21:05 +0000 |
| commit | 771ced73fccd0ac19bb956eaacce3669cfccc805 (patch) | |
| tree | 1ad01ca512fd3872442d96155a140a1c2ad0cf74 /drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | |
| parent | drm/amdgpu: don't set s3 and s0ix at the same time (diff) | |
| download | kernel-771ced73fccd0ac19bb956eaacce3669cfccc805.tar.gz kernel-771ced73fccd0ac19bb956eaacce3669cfccc805.zip | |
drm/amd/display: Fix underflow for fused display pipes case
[Why]
Depend on res_pool->res_cap->num_timing_generator to query timing
gernerator information, it would case underflow at the fused display
pipes case.
Due to the res_pool->res_cap->num_timing_generator records default
timing generator resource built in driver, not the current chip.
[How]
Some ASICs would be fused display pipes less than the default setting.
In dcnxx_resource_construct function, driver would obatin real timing
generator count and store it into res_pool->timing_generator_count.
Tested-by: Daniel Wheeler <[email protected]>
Reviewed-by: Anthony Koo <[email protected]>
Acked-by: Rodrigo Siqueira <[email protected]>
Signed-off-by: Yi-Ling Chen <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c')
0 files changed, 0 insertions, 0 deletions