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authorFang Xiang <[email protected]>2023-10-30 08:32:56 +0000
committerThomas Gleixner <[email protected]>2023-11-06 00:16:33 +0000
commitd3badb15613c14dd35d3495b1dde5c90fcd616dd (patch)
treed90e3efeb72dbe2d77592012884e05bd2efb0b9e /drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
parentMerge tag 'x86_tdx_for_6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/... (diff)
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irqchip/gic-v3-its: Flush ITS tables correctly in non-coherent GIC designs
In non-coherent GIC designs, the ITS tables must be flushed before writing to the GITS_BASER<n> registers, otherwise the ITS could read dirty tables, which results in unpredictable behavior. Flush the tables right at the begin of its_setup_baser() to prevent that. [ tglx: Massage changelog ] Fixes: a8707f553884 ("irqchip/gic-v3: Add Rockchip 3588001 erratum workaround") Suggested-by: Marc Zyngier <[email protected]> Signed-off-by: Fang Xiang <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Reviewed-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c')
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