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| author | Fei Shao <[email protected]> | 2024-12-04 14:25:38 +0000 |
|---|---|---|
| committer | Chun-Kuang Hu <[email protected]> | 2025-01-02 13:40:27 +0000 |
| commit | ba5811562988652d88de7503b3bd12da063ae729 (patch) | |
| tree | 0b979ecda5a105683f13360903aaa7c3f820b6b1 /drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | |
| parent | drm/mediatek: dp: Add sdp path reset (diff) | |
| download | kernel-ba5811562988652d88de7503b3bd12da063ae729.tar.gz kernel-ba5811562988652d88de7503b3bd12da063ae729.zip | |
drm/mediatek: dp: Support flexible length of DP calibration data
The DP calibration data is stored in nvmem cells, and the data layout is
described in the `mtk_dp_efuse_fmt` arrays for each platform.
There is no guarantee that the data is always a 4-length u32 cell array.
For example, MT8188 has a data length of 3, preventing it from passing
the preliminary check and undergoing calibration.
Update the logic to support flexible data lengths. Specifically, we
validate the length returned from `nvmem_cell_read()` against the
platform-specific efuse format. If out-of-bound access is detected, fall
back to the default calibration values. This likely indicates an error
in either the efuse data length described in DT or the efuse format
within the driver.
Signed-off-by: Fei Shao <[email protected]>
Reviewed-by: CK Hu <[email protected]>
Link: https://patchwork.kernel.org/project/dri-devel/patch/[email protected]/
Signed-off-by: Chun-Kuang Hu <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c')
0 files changed, 0 insertions, 0 deletions