diff options
| author | Yifan Zha <[email protected]> | 2023-01-31 07:31:27 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2023-02-03 20:41:36 +0000 |
| commit | 72fef4980ddf20792fa095f88b008d896313c2b1 (patch) | |
| tree | 53fde2832df04e70c1d33297bdd71348e8ae9bd6 /drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | |
| parent | drm/amdgpu: always sending PSP messages LOAD_ASD and UNLOAD_TA (diff) | |
| download | kernel-72fef4980ddf20792fa095f88b008d896313c2b1.tar.gz kernel-72fef4980ddf20792fa095f88b008d896313c2b1.zip | |
drm/amdgpu: Remove writing GRBM_GFX_CNTL in RLCG interface under SRIOV
[Why]
Accessing GRBM_GFX_CNTL in full access time has risk when VF is doing MMIO attacking.
Therefore, VF writing GRBM_GFX_CNTL are blocked by L1 Policy.
For RLCG interface, RLCG use SCRATCH_REG2 which is copied from GRBM_GFX_CNTL.
[How]
Remove writing GRBM_GFX_CNTL in amdgpu_virt_rlcg_reg_rw.
v2:
Remove directly writing GRBM_GFX_INDEX in amdgpu_virt_rlcg_reg_rw
as RLCG interface no need to use it.
Signed-off-by: Yifan Zha <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c index f39391e03d46..ca5a1d026f5a 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c @@ -983,11 +983,9 @@ static u32 amdgpu_virt_rlcg_reg_rw(struct amdgpu_device *adev, u32 offset, u32 v if (offset == reg_access_ctrl->grbm_cntl) { /* if the target reg offset is grbm_cntl, write to scratch_reg2 */ writel(v, scratch_reg2); - writel(v, ((void __iomem *)adev->rmmio) + (offset * 4)); } else if (offset == reg_access_ctrl->grbm_idx) { /* if the target reg offset is grbm_idx, write to scratch_reg3 */ writel(v, scratch_reg3); - writel(v, ((void __iomem *)adev->rmmio) + (offset * 4)); } else { /* * SCRATCH_REG0 = read/write value |