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| author | Peng Fan <[email protected]> | 2022-08-30 03:31:32 +0000 |
|---|---|---|
| committer | Abel Vesa <[email protected]> | 2022-09-19 10:06:45 +0000 |
| commit | 4a3de5aa7743d1def6fba783c072e41df6b851c5 (patch) | |
| tree | 78548dbc68c00732f2e4fd9b8858891a78ccc3e8 /drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | |
| parent | dt-bindings: clock: imx93-clock: add more MU/SAI clocks (diff) | |
| download | kernel-4a3de5aa7743d1def6fba783c072e41df6b851c5.tar.gz kernel-4a3de5aa7743d1def6fba783c072e41df6b851c5.zip | |
clk: imx: clk-composite-93: check slice busy
i.MX93 CCM ROOT STAT register has a SLICE_BUSY bit:
indication for clock generation logic is applying new setting.
0b - Clock generation logic is not busy.
1b - Clock generation logic is applying new setting.
So when set parent/rate/gate, need check this bit.
Introduce specific ops to do the work.
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Ye Li <[email protected]>
Reviewed-by: Jacky Bai <[email protected]>
Reviewed-by: Abel Vesa <[email protected]>
Signed-off-by: Abel Vesa <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c')
0 files changed, 0 insertions, 0 deletions