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| author | Marijn Suijten <[email protected]> | 2022-10-26 18:28:24 +0000 |
|---|---|---|
| committer | Dmitry Baryshkov <[email protected]> | 2022-11-04 14:39:41 +0000 |
| commit | cc84b66be223d36a3d10d59d68ba647e72db3099 (patch) | |
| tree | bdcbc1b6407614c62884dc76d1c476ab400dc810 /drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c | |
| parent | drm/msm/dpu1: Account for DSC's bits_per_pixel having 4 fractional bits (diff) | |
| download | kernel-cc84b66be223d36a3d10d59d68ba647e72db3099.tar.gz kernel-cc84b66be223d36a3d10d59d68ba647e72db3099.zip | |
drm/msm/dsi: Prevent signed BPG offsets from bleeding into adjacent bits
The bpg_offset array contains negative BPG offsets which fill the full 8
bits of a char thanks to two's complement: this however results in those
bits bleeding into the next field when the value is packed into DSC PPS
by the drm_dsc_helper function, which only expects range_bpg_offset to
contain 6-bit wide values. As a consequence random slices appear
corrupted on-screen (tested on a Sony Tama Akatsuki device with sdm845).
Use AND operators to limit these two's complement values to 6 bits,
similar to the AMD and i915 drivers.
Fixes: b9080324d6ca ("drm/msm/dsi: add support for dsc data")
Reviewed-by: Abhinav Kumar <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Signed-off-by: Marijn Suijten <[email protected]>
Patchwork: https://patchwork.freedesktop.org/patch/508941/
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Dmitry Baryshkov <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c')
0 files changed, 0 insertions, 0 deletions