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authorArvind Yadav <[email protected]>2025-03-18 13:15:40 +0000
committerAlex Deucher <[email protected]>2025-04-08 20:48:21 +0000
commit32bd8b3ea7071ca96d4adcd0817046e09c5df415 (patch)
tree9e15a1e201e07a148bb1291481d2a4edf9d4647d /drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
parentdrm/amdgpu/mes: warn on unexpected pipe numbers (diff)
downloadkernel-32bd8b3ea7071ca96d4adcd0817046e09c5df415.tar.gz
kernel-32bd8b3ea7071ca96d4adcd0817046e09c5df415.zip
drm/amdgpu: Fix display freezing issue when resizing apps
The display is freezing because the amdgpu_userq_wait_ioctl() is waiting for a non-user queue fence(specifically, the PT update fence). RootCause: The resume_work is initiated by both amdgpu_userq_suspend and amdgpu_userqueue_ensure_ev_fence at same time. The amdgpu_userq_suspend signals a dma-fence and subsequently triggers the resume_work, which is intended to replace the existing fence by creating new dma-fence. However, following this, the amdgpu_userqueue_ensure_ev_fence schedules another resume_work that generates a new dma-fence, thereby replacing the one created by amdgpu_userq_suspend. Consequently, the original fence will never be signaled. Cc: Alex Deucher <[email protected]> Cc: Christian König <[email protected]> Cc: Shashank Sharma <[email protected]> Cc: Sunil Khatri <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Shashank Sharma <[email protected]> Signed-off-by: Arvind Yadav <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
index a02614cbda36..beae931152a3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
@@ -555,8 +555,11 @@ unlock_all:
static void amdgpu_userqueue_resume_worker(struct work_struct *work)
{
struct amdgpu_userq_mgr *uq_mgr = work_to_uq_mgr(work, resume_work.work);
+ struct amdgpu_fpriv *fpriv = uq_mgr_to_fpriv(uq_mgr);
int ret;
+ flush_work(&fpriv->evf_mgr.suspend_work.work);
+
mutex_lock(&uq_mgr->userq_mutex);
ret = amdgpu_userqueue_validate_bos(uq_mgr);