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| author | Paul Cercueil <[email protected]> | 2021-03-23 14:40:08 +0000 |
|---|---|---|
| committer | Paul Cercueil <[email protected]> | 2021-05-17 15:07:04 +0000 |
| commit | 60a6b73dd821e98fe958b2a83393ccd724b306b1 (patch) | |
| tree | 71a3d96f893e56ca4419c5b06258a815806cb63f /drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | |
| parent | MAINTAINERS: repair reference in DRM DRIVER FOR SIMPLE FRAMEBUFFERS (diff) | |
| download | kernel-60a6b73dd821e98fe958b2a83393ccd724b306b1.tar.gz kernel-60a6b73dd821e98fe958b2a83393ccd724b306b1.zip | |
drm/ingenic: Fix pixclock rate for 24-bit serial panels
When using a 24-bit panel on a 8-bit serial bus, the pixel clock
requested by the panel has to be multiplied by 3, since the subpixels
are shifted sequentially.
The code (in ingenic_drm_encoder_atomic_check) already computed
crtc_state->adjusted_mode->crtc_clock accordingly, but clk_set_rate()
used crtc_state->adjusted_mode->clock instead.
Fixes: 28ab7d35b6e0 ("drm/ingenic: Properly compute timings when using a 3x8-bit panel")
Cc: [email protected] # v5.10
Signed-off-by: Paul Cercueil <[email protected]>
Tested-by: H. Nikolaus Schaller <[email protected]> # CI20/jz4780 (HDMI) and Alpha400/jz4730 (LCD)
Acked-by: Thomas Zimmermann <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c')
0 files changed, 0 insertions, 0 deletions