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| author | Vinay Belgaumkar <[email protected]> | 2022-10-26 22:21:00 +0000 |
|---|---|---|
| committer | John Harrison <[email protected]> | 2022-10-27 19:37:01 +0000 |
| commit | 01e7427467857861d1aaa7cd05598dfcb631c5b5 (patch) | |
| tree | 40f2d6c47e67949e5f68253d0b1ecf7baa96b50d /drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c | |
| parent | drm/i915/perf: Save/restore EU flex counters across reset (diff) | |
| download | kernel-01e7427467857861d1aaa7cd05598dfcb631c5b5.tar.gz kernel-01e7427467857861d1aaa7cd05598dfcb631c5b5.zip | |
drm/i915/guc: Support OA when Wa_16011777198 is enabled
On DG2, a w/a resets RCS/CCS before it goes into RC6. This breaks OA
since OA does not expect engine resets during its use. Fix it by
disabling RC6.
v2: (Ashutosh)
- Bring back slpc_unset_param helper
- Update commit msg
- Use with_intel_runtime_pm helper for set/unset
v3: (Ashutosh)
- Just use intel_uc_uses_guc_rc
Signed-off-by: Vinay Belgaumkar <[email protected]>
Signed-off-by: Umesh Nerlige Ramappa <[email protected]>
Reviewed-by: Ashutosh Dixit <[email protected]>
Signed-off-by: John Harrison <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c')
0 files changed, 0 insertions, 0 deletions