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| author | David Zhang <[email protected]> | 2022-05-03 21:53:44 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2022-06-07 20:09:57 +0000 |
| commit | 6bad4ff84cb57f548d42a41091159b750eed9ef9 (patch) | |
| tree | b6f046266e391da3c94c3ccb1ae6d9c99feb0ed6 /drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | |
| parent | drm/amd/display: 3.2.189 (diff) | |
| download | kernel-6bad4ff84cb57f548d42a41091159b750eed9ef9.tar.gz kernel-6bad4ff84cb57f548d42a41091159b750eed9ef9.zip | |
drm/amd/display: expose AMD specific DPCD for PSR-SU-RC support
[why & how]
Expose vendor specific DPCD registers for rate controlling the eDP sink
TCON's refresh rate during PSR active. When used in combination with
PSR-SU and Freesync, it is called PSR-SU Rate Contorol, or PSR-SU-RC for
short.
v2: Add all DPCD registers required
Signed-off-by: David Zhang <[email protected]>
Acked-by: Leo Li <[email protected]>
Reviewed-by: Harry Wentland <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c')
0 files changed, 0 insertions, 0 deletions