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authorDoug Brown <[email protected]>2022-06-12 19:29:28 +0000
committerStephen Boyd <[email protected]>2022-09-30 20:34:06 +0000
commit260d2f347b765422584a5fa5209b8ecd17d773b4 (patch)
treecb10ee4007fd9235c7fcdec2e652b3f6762788e4 /drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
parentclk: mmp: pxa168: fix incorrect dividers (diff)
downloadkernel-260d2f347b765422584a5fa5209b8ecd17d773b4.tar.gz
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dt-bindings: marvell,pxa168: add clock ids for additional dividers
This adds a few new clocks divided from PLL1 and CLK32 that are potentially used by a few peripherals with muxed clocks. Signed-off-by: Doug Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Acked-by: Rob Herring <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c')
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