aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c
diff options
context:
space:
mode:
authorJani Nikula <[email protected]>2024-06-19 08:38:31 +0000
committerJani Nikula <[email protected]>2024-06-19 08:38:31 +0000
commitd754ed2821fd9675d203cb73c4afcd593e28b7d0 (patch)
treecd16683cd956a7c334d7e1b3baf02e2e7baa729c /drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c
parentintel_alpm: Fix wrong offset for PORT_ALPM_* registers (diff)
parentMerge tag 'amd-drm-next-6.11-2024-06-07' of https://gitlab.freedesktop.org/ag... (diff)
downloadkernel-d754ed2821fd9675d203cb73c4afcd593e28b7d0.tar.gz
kernel-d754ed2821fd9675d203cb73c4afcd593e28b7d0.zip
Merge drm/drm-next into drm-intel-next
Sync to v6.10-rc3. Signed-off-by: Jani Nikula <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c36
1 files changed, 36 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c
index ea4873f6ccd1..9deb41d61e8d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c
@@ -33,6 +33,7 @@ int amdgpu_reset_init(struct amdgpu_device *adev)
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
case IP_VERSION(13, 0, 2):
case IP_VERSION(13, 0, 6):
+ case IP_VERSION(13, 0, 14):
ret = aldebaran_reset_init(adev);
break;
case IP_VERSION(11, 0, 7):
@@ -55,6 +56,7 @@ int amdgpu_reset_fini(struct amdgpu_device *adev)
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
case IP_VERSION(13, 0, 2):
case IP_VERSION(13, 0, 6):
+ case IP_VERSION(13, 0, 14):
ret = aldebaran_reset_fini(adev);
break;
case IP_VERSION(11, 0, 7):
@@ -158,3 +160,37 @@ void amdgpu_device_unlock_reset_domain(struct amdgpu_reset_domain *reset_domain)
atomic_set(&reset_domain->in_gpu_reset, 0);
up_write(&reset_domain->sem);
}
+
+void amdgpu_reset_get_desc(struct amdgpu_reset_context *rst_ctxt, char *buf,
+ size_t len)
+{
+ struct amdgpu_ring *ring;
+
+ if (!buf || !len)
+ return;
+
+ switch (rst_ctxt->src) {
+ case AMDGPU_RESET_SRC_JOB:
+ if (rst_ctxt->job) {
+ ring = amdgpu_job_ring(rst_ctxt->job);
+ snprintf(buf, len, "job hang on ring:%s", ring->name);
+ } else {
+ strscpy(buf, "job hang", len);
+ }
+ break;
+ case AMDGPU_RESET_SRC_RAS:
+ strscpy(buf, "RAS error", len);
+ break;
+ case AMDGPU_RESET_SRC_MES:
+ strscpy(buf, "MES hang", len);
+ break;
+ case AMDGPU_RESET_SRC_HWS:
+ strscpy(buf, "HWS hang", len);
+ break;
+ case AMDGPU_RESET_SRC_USER:
+ strscpy(buf, "user trigger", len);
+ break;
+ default:
+ strscpy(buf, "unknown", len);
+ }
+}