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| author | Victor Zhao <[email protected]> | 2022-07-28 02:44:47 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2022-08-16 22:14:31 +0000 |
| commit | 672c0218e3e22ccaeb2911da8d3b784d3b6cc1d8 (patch) | |
| tree | 10c93731efc1b0909cee67a0b34c9780df70565b /drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c | |
| parent | Revert "drm/amd/amdgpu: add pipe1 hardware support" (diff) | |
| download | kernel-672c0218e3e22ccaeb2911da8d3b784d3b6cc1d8.tar.gz kernel-672c0218e3e22ccaeb2911da8d3b784d3b6cc1d8.zip | |
drm/amdgpu: add mode2 reset for sienna_cichlid
To meet the requirement for multi container usecase which needs
a quicker reset and not causing VRAM lost, adding the Mode2
reset handler for sienna_cichlid.
v2: move skip mode2 flag part separately
v3: remove the use of asic_reset_res
Signed-off-by: Victor Zhao <[email protected]>
Acked-by: Andrey Grodzovsky <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c index 32c86a0b145c..f778466bb9db 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c @@ -23,6 +23,7 @@ #include "amdgpu_reset.h" #include "aldebaran.h" +#include "sienna_cichlid.h" int amdgpu_reset_add_handler(struct amdgpu_reset_control *reset_ctl, struct amdgpu_reset_handler *handler) @@ -40,6 +41,9 @@ int amdgpu_reset_init(struct amdgpu_device *adev) case IP_VERSION(13, 0, 2): ret = aldebaran_reset_init(adev); break; + case IP_VERSION(11, 0, 7): + ret = sienna_cichlid_reset_init(adev); + break; default: break; } @@ -55,6 +59,9 @@ int amdgpu_reset_fini(struct amdgpu_device *adev) case IP_VERSION(13, 0, 2): ret = aldebaran_reset_fini(adev); break; + case IP_VERSION(11, 0, 7): + ret = sienna_cichlid_reset_fini(adev); + break; default: break; } |