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authorJinzhou Su <[email protected]>2021-04-12 07:45:31 +0000
committerAlex Deucher <[email protected]>2021-04-15 20:32:44 +0000
commitb45fdeab45bc42c2cd2dfbb3d11a3dd797907af6 (patch)
tree80e1f08bceafd75e2d69052e71b31ae77aeb8ed8 /drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
parentdrm/amdgpu: Ensure dcefclk isn't created on Aldebaran (diff)
downloadkernel-b45fdeab45bc42c2cd2dfbb3d11a3dd797907af6.tar.gz
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drm/amdgpu: Add graphics cache rinse packet for sdma
Add emit mem sync callback for sdma_v5_2 In amdgpu sync object test, three threads created jobs to send GFX IB and SDMA IB in sequence. After the first GFX thread joined, sometimes the third thread will reuse the same physical page to store the SDMA IB. There will be a risk that SDMA will read GFX IB in the previous physical page. So it's better to flush the cache before commit sdma IB. Signed-off-by: Jinzhou Su <[email protected]> Reviewed-by: Huang Rui <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c')
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