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| author | Wenjing Liu <[email protected]> | 2022-12-06 17:06:40 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2023-01-03 21:57:57 +0000 |
| commit | a10a22b0cadb5812f8b7b9bbbb26f402ca8cc463 (patch) | |
| tree | f079351197689711900e513d8ff15831379015c1 /drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | |
| parent | drm/amd/display: move dccg programming from link hwss hpo dp to hwss (diff) | |
| download | kernel-a10a22b0cadb5812f8b7b9bbbb26f402ca8cc463.tar.gz kernel-a10a22b0cadb5812f8b7b9bbbb26f402ca8cc463.zip | |
drm/amd/display: update pixel rate div in enable stream
[why]
Pixel rate div depends on the type of encoder
that we are enabling stream with. If we swap between
HPO and DIO encoder at the time we call enable stream
for the new encoder, we must reprogram pixel rate div
based on the new encoder type.
Acked-by: Aurabindo Pillai <[email protected]>
Signed-off-by: Wenjing Liu <[email protected]>
Reviewed-by: Jun Lei <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c')
0 files changed, 0 insertions, 0 deletions