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| author | Michael Strauss <[email protected]> | 2023-12-04 08:30:39 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2025-05-13 13:31:21 +0000 |
| commit | 8989cb919b27cd0d2aadb7f1d144cedbb12e6fca (patch) | |
| tree | 8078eda29a0a171a4743bc96e63bec5041c15696 /drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | |
| parent | drm/amd/display: Program triplebuffer on all pipes (diff) | |
| download | kernel-8989cb919b27cd0d2aadb7f1d144cedbb12e6fca.tar.gz kernel-8989cb919b27cd0d2aadb7f1d144cedbb12e6fca.zip | |
drm/amd/display: Add early 8b/10b channel equalization test pattern sequence
[WHY]
Early EQ pattern sequence is required for some LTTPR + old dongle
combinations.
[HOW]
If DP_EARLY_8B10B_TPS2 chip cap is set, this new sequence programs phy
to output TPS2 before initiating link training and writes TPS1 to
LTTPR training pattern register as instructed by vendor.
Add function to get embedded LTTPR target address offset.
Reviewed-by: Wenjing Liu <[email protected]>
Signed-off-by: Michael Strauss <[email protected]>
Signed-off-by: TungYu Lu <[email protected]>
Signed-off-by: Ray Wu <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c')
0 files changed, 0 insertions, 0 deletions