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| author | Alvin Lee <[email protected]> | 2024-04-17 22:44:16 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2024-04-30 13:56:21 +0000 |
| commit | 3351c608f373bc76dcfa773723c2d1f7c5b5c55e (patch) | |
| tree | a297ba0325175786954042e1058926dc05da5ebe /drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | |
| parent | drm/amd/display: Revert "dc: Keep VBios pixel rate div setting util next mode... (diff) | |
| download | kernel-3351c608f373bc76dcfa773723c2d1f7c5b5c55e.tar.gz kernel-3351c608f373bc76dcfa773723c2d1f7c5b5c55e.zip | |
drm/amd/display: Only program P-State force if pipe config changed
[Description]
Today for MED update type we do not call update clocks. However, for FPO
the assumption is that update clocks should be called to disable P-State
switch before any HW programming since FPO in FW and driver are not
synchronized. This causes an issue where on a MED update, an FPO P-State
switch could be taking place, then driver forces P-State disallow in the below
code and prevents FPO from completing the sequence. In this case we add a check
to avoid re-programming (and thus re-setting) the P-State force register by
only reprogramming if the pipe was not previously Subvp or FPO. The assumption
is that the P-State force register should be programmed correctly the first
time SubVP / FPO was enabled, so there's no need to update / reset it if the
pipe config has never exited SubVP / FPO.
Reviewed-by: Samson Tam <[email protected]>
Acked-by: Wayne Lin <[email protected]>
Signed-off-by: Alvin Lee <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c')
0 files changed, 0 insertions, 0 deletions
