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authorKonrad Dybcio <[email protected]>2025-06-26 09:02:40 +0000
committerRob Clark <[email protected]>2025-07-05 00:48:40 +0000
commit2728285988c3e94ce92104a58b4cee848c4602de (patch)
treef0301e5a5ae430deaa017b39cfe014c557daea9c /drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
parentsoc: qcom: ubwc: Add #defines for UBWC swizzle bits (diff)
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soc: qcom: ubwc: Fill in UBWC swizzle cfg for platforms that lack one
The UBWC 1.0 case is easy - it must be all 3 enabled. UBWC2.0 and 3.x require that level1 is removed, follow suit. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Konrad Dybcio <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/660983/ Signed-off-by: Rob Clark <[email protected]>
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