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| author | Hugo Villeneuve <[email protected]> | 2025-04-17 19:55:06 +0000 |
|---|---|---|
| committer | Neil Armstrong <[email protected]> | 2025-04-22 07:42:04 +0000 |
| commit | 095c8e61f4c71cd4630ee11a82e82cc341b38464 (patch) | |
| tree | 749eebf124b18c39747e78ddcbe498c88022e54b /drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | |
| parent | drm/meson: use unsigned long long / Hz for frequency types (diff) | |
| download | kernel-095c8e61f4c71cd4630ee11a82e82cc341b38464.tar.gz kernel-095c8e61f4c71cd4630ee11a82e82cc341b38464.zip | |
drm: panel: jd9365da: fix reset signal polarity in unprepare
commit a8972d5a49b4 ("drm: panel: jd9365da-h3: fix reset signal polarity")
fixed reset signal polarity in jadard_dsi_probe() and jadard_prepare().
It was not done in jadard_unprepare() because of an incorrect assumption
about reset line handling in power off mode. After looking into the
datasheet, it now appears that before disabling regulators, the reset line
is deasserted first, and if reset_before_power_off_vcioo is true, then the
reset line is asserted.
Fix reset polarity by inverting gpiod_set_value() second argument in
in jadard_unprepare().
Fixes: 6b818c533dd8 ("drm: panel: Add Jadard JD9365DA-H3 DSI panel")
Fixes: 2b976ad760dc ("drm/panel: jd9365da: Support for kd101ne3-40ti MIPI-DSI panel")
Fixes: a8972d5a49b4 ("drm: panel: jd9365da-h3: fix reset signal polarity")
Cc: [email protected]
Signed-off-by: Hugo Villeneuve <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_object.c')
0 files changed, 0 insertions, 0 deletions