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| author | Dave Airlie <[email protected]> | 2020-09-22 23:25:17 +0000 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2020-09-22 23:25:18 +0000 |
| commit | fc88fef916e8971eefeacc62241b7408b7e7939d (patch) | |
| tree | c2647e7388a752ffc1f9d12b5aaf9a83a69b5ba0 /drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | |
| parent | Merge tag 'drm-intel-next-2020-09-17' of git://anongit.freedesktop.org/drm/dr... (diff) | |
| parent | drm/amd/pm: Skip smu_post_init in SRIOV (diff) | |
| download | kernel-fc88fef916e8971eefeacc62241b7408b7e7939d.tar.gz kernel-fc88fef916e8971eefeacc62241b7408b7e7939d.zip | |
Merge tag 'amd-drm-next-5.10-2020-09-18' of git://people.freedesktop.org/~agd5f/linux into drm-next
amd-drm-next-5.10-2020-09-18:
amdgpu:
- Support for PCIe DPC recovery
- Sienna Cichlid updates
- Navy Flounder updates
- RAS fixes
- Refactor DC interrupt handling
- Display fixes
- Fix issues with OLED panels
- Mclk fixes for navi1x
- Watermark fixes for renoir and raven2
- Misc code cleanups
- Misc bug fixes
amdkfd:
- Fix a memory leak
- Fix a crach in GPU reset
- Add process eviction counters
radeon:
- expose sclk via sysfs hwmon interface
- Revert bad PLL fix
scheduler:
- Kernel doc fixes
Signed-off-by: Dave Airlie <[email protected]>
From: Alex Deucher <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h index 04a430e0e2e1..a04decb934b0 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h @@ -46,6 +46,7 @@ #include <drm/drm_dp_mst_helper.h> #include "modules/inc/mod_freesync.h" +#include "amdgpu_dm_irq_params.h" struct amdgpu_bo; struct amdgpu_device; @@ -404,7 +405,8 @@ struct amdgpu_crtc { struct amdgpu_flip_work *pflip_works; enum amdgpu_flip_status pflip_status; int deferred_flip_completion; - u32 last_flip_vblank; + /* parameters access from DM IRQ handler */ + struct dm_irq_params dm_irq_params; /* pll sharing */ struct amdgpu_atom_ss ss; bool ss_enabled; |